Senior Systems Verification Engineer - Qualcomm - Sophia or Guyancourt, France
Qualcomm
·Today
- Location
- Digne, Provence-Alpes-Côte d'Azur,FR, FR · Guyancourt, Île-de-France,FR, FR
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Education
- Bachelor
- Source
- Eightfold
Description
##
Company:
Qualcomm France S.A.R.L.
## Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
Qualcomm Interconnect Technology (QITC) has been breaking ground in interconnect design for 15 years and continues to innovate and deliver technology in line with the latest evolutions in SoC design.
As part of Qualcomm Infrastructure division, QITC’s mission is to develop and deploy custom-built interconnect hardware IPs, software tools, exploration and verification methodologies, including Emulation platforms, so that SoC integration teams can quickly assemble SoCs with the desired Power, Performance, Area characteristics.
The Job consists of verifying the NoC solutions behave as intended in the full System, and that the CPU / NSP to DDR performance targets are achieved.
Responsibilities:
The engineer will be in charge of defining and implementing System & Performance validation plans centered around QCOM interconnects, by running bare metal testcases and Linux benchmarks for latest CPU architectures on custom Emulators, as well as NSP micro-benchmark execution. He or she will then participate in the infrastructure performance analysis, exploration and automatization infrastructure.
Skills and Experience:
Good Low-level Software knowledge: C, ARM Assembly
Strong Systems understanding: ARM CPU Architecture, Interconnects & Protocols, DDR is a plus
DSP / NSP knowledge is a plus
Understand Cache and Coherency concepts
Understanding of Emulation methodology: FPGA, Debug tools, RTL Simulation
Additional Skills:
Python, Verilog
Linux Kernel boot flow
Strong motivation and team spirit
Working environment: Linux
Educational Requirements:
Micro-electronics or similar Engineer Diploma 5 years + 5 years of industry experience minimum
Technical Experience:
Essential : Verification Methodology, C / Assembly, Interconnect & Protocols minimum understanding
Desirable: Python, DRAM & Scheduling, Linux Kernel, Emulation or Silicon Validation experience
Minimum Qualifications:
- Bachelor's degree in Science, Engineering, or related field.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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