- Location
- San Diego, CA,US, US
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Education
- PhD
- Source
- Eightfold
Description
Positive Attitude: Bring a fun-loving attitude and a passion for inclusively solving problems. Experience: 5+ years of ASIC design experience RTL Expertise: System Verilog Design, Linting, CDC, Synthesis (FPGA and ASIC) Testing: Building the test suites for design validation Emulation: understanding of Emulation and prototyping flows for the design and validation in Lab is a big Plus. Complex Digital Logic Design: Experience with designing complex digital logic blocks and sub systems (CPU, GPU, DSP, Always on Systems, Digital interfaces (PCIe, UART, I2c, DDRx, SPI, USB). ISA Familiarity: Knowledge of ISAs (Instruction Set Architectures) such as ARM THUMB or RISC-V. Processor/Microcontroller System Design: Understanding of processor or microcontroller system design. Multi-Power Domain and Multi-Clock Domain Designs: Experience with designs spanning multiple power domains and clock domains. Scripting/Automation Languages: Proficiency in scripting or automation languages like Python or Perl. Industry Standard Digital Tools: Familiarity with state-of-the-art industry-standard digital design tools. Challenges of Lower Node Technologies: Awareness of challenges faced when working with lower node technologies. Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.