Hiring.Camp

Design Verification, Forward Deployed Engineering

Openai

•

May 8, 2026

San Francisco +1HybridFull-timeScaling$162k – $302k/yr

Skills & Technologies

PythonSOCCompliance

Ready to apply?

Opens Openai's career page

Apply Now
Back to jobs

Similar Jobs

30

Design Verification Lead – Peripheral IP Group (UVM) - Haifa, Israel

Qualcomm
Haifa, Haifa District,IL, IL

E-Core/Quark CPU Design Verification Engineer

Intel
MYS - Penang, Malaysia

Design Verification Engineer I

Forj Medical
1635 Energy Park Dr, St Paul, MN 55108, USA

Senior Design Verification Engineer

Altera
Oregon Hillsboro, United States of America

Design & Verification Engineer

Rambus
SOFIA, BG

Chip Design Verification Engineer

Nvidia
Israel, Yokneam +1 more

CPU Design Verification Sr Engineer

Qualcomm
Bengaluru, KA,IN, IN

Chip Design Verification Engineer

Nvidia
Yokne'am Illit, North District,IL, IL +1 more

Design Verification Engineer I

Forj Medical
1635 Energy Park Dr, St Paul, MN 55108, USA

Camera IP Design Verification - Staff Engineer

Qualcomm
Bengaluru, KA,IN, IN

Principal ASIC Design Verification Engineer

K2Spacecorporation
United States - Remote

Senior Design Verification Engineer

Philips
Shenyang - PIC, China

Senior Digital Design & Verification Engineer

Job Listings
Caen, France +1 more

Principal Engineer, Design Verification - DDR Memory Subsystems

Altera
San Jose, California, United States, United States of America

Design Verification Engineer, Staff

Marvell
US-CA - Santa Clara, United States of America

Senior Engineer, Design Verification Engineering

Analogdevices
India, Bangalore, Nova +2 more

Manager, Design Verification

Analogdevices
CLOSED-India, Bangalore, Aveda Meta

Senior PCIe Design Verification Engineer

Nvidia
Taiwan, Taipei +1 more

Senior PCIe Design Verification Engineer

Nvidia
Taipei City,TW, TW +1 more

ASIC Design Verification Engineer, Technical Leader

Cisco
USA-SAN JOSE, United States of America

Digital Mixed Signal (DMS) Design Verification Engineer

Analogdevices
India, Bangalore, RMZ

Digital Mixed Signal (DMS) Design Verification Engineer

Analogdevices
India, Bangalore, RMZ

Senior Mixed Signal Design Verification Engineer

Nvidia
Taiwan, Hsinchu +1 more

Senior/Staff Design Verification Engineer (SOC)

Bitdeer Technologies Group
SG

Display ASIC Design Verification Engineer

Qualcomm
Markham, ON,CA, CA

Senior Mixed Signal Design Verification Engineer

Nvidia
Hsinchu, Hsinchu City,TW, TW +1 more

Senior FPGA Design Verification Engineer

Intuitive Surgical
Sunnyvale, CA, United States

Soc Design Verification Director

Asteralabs
Bengaluru, Karnataka, India +1 more

Senior Staff Engineer, GPU Design Verification (Formal Verification)

Samsung
3655 N 1st St, San Jose, CA, USA, United States of America

Design Verification Engineer

Intel
USA - CA - Santa Clara, United States of America