Hiring.Camp

Mixed Signal Design Verification Engineer

Intel

·

Today

Location
SRR4 - SRR4 - Sarjapur 4, India
Workplace
Onsite
Type
Full-time
Department
Engineering
Experience
4+ years
Education
Master
Source
Workday

Description

Job Details:

Job Description: 

Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to mixed signal microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology.

Qualifications:

Minimum Qualifications
- Bachelor's or Master's degree in Electronics, VLSI Engineering, or a related field.
- 4+ years of experience with a Bachelor's degree, or 3+ years of experience with a Master's degree in ASIC/SoC verification.
- Proficiency in System Verilog, UVM, and Verilog for mixed signal verification.
- Experience with industry-standard EDA tools such as Synopsys VCS, Cadence Xcelium/JasperGold, or Mentor Questa.
- Strong scripting skills in Python, Perl, or Tcl for testbench automation.
- Knowledge of standard protocols including JTAG/IJTAG/CRI/APB, and multi-clock domain mixed signal designs.
- Expertise in constraint-random test generation, root cause analysis, and debugging of complex mixed signal designs.

Preferred Qualifications
- Familiarity with Mixed Signal IP validation.
- Experience with low-power design techniques, such as UPF and clock gating.
- Knowledge of Formal Property Verification tools and version control systems like Git, Perforce, or CVS.
- Strong collaboration and communication skills, with the ability to work effectively within dynamic, multi-disciplinary teams.

Join us to shape the future of technology by driving verification excellence at Intel. Apply today and be a part of our journey to deliver world-class innovations.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills

PythonPerlGitCompliance

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Mixed Signal Design Verification Engineer at Intel | Hiring.Camp