- Location
- TW Chungho, Taiwan
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Education
- Master
- Source
- Workday
Description
Job Purpose
The WLCSP Engineer is responsible for overseeing the development, qualification, line sustaining, and yield improvement of Wafer Level Chip Scale Packages (WLCSP) manufactured at global OSAT partners. You will act as the technical anchor and primary interface to manage subcontractor relationships, drive technical issue resolution, and lead continuous process optimization.
Key Responsibilities
- OSAT & Vendor Management: Serve as the primary manufacturing engineering interface for outsourced assembly partners. Conduct regular technical reviews, monitor line performance metrics (KPIs), and manage capacity and supplier change requests (PCNs).
- Process Engineering & NPI: Manage the transfer of new WLCSP products from development to production phase (NPI-to-production). Supervise wafer-level processing steps at the OSAT, including back-grinding, dicing, bumping (Cu Pillar / solder ball drop), and redistribution layer (RDL) formation.
- Yield & Cost Optimization: Continuous tracking and improvement of WLCSP assembly yields, tracking defect reduction programs, and managing "Safe Launch" execution for early-production ramps.
- Quality & Failure Analysis: Lead Root Cause Analysis (RCA) and 8D problem-solving methodologies for line excursions, reliability test failures, and customer RMAs.
- Line Sustaining & Statistical Control: Monitor OSAT process capabilities using Statistical Process Control (SPC) and Design of Experiments (DOE) to prevent line disruptions and ensure process stability.
Required Technical Skills & Qualifications
- Education: Bachelor’s or Master's degree in Electrical/Electronic Engineering, Materials Science, Mechanical Engineering, or related technical disciplines.
- Experience: 8+ years of semiconductor packaging experience, with a definitive track record in WLCSP/Advanced Packaging and OSAT/subcontractor management.
- Advanced Packaging Expertise: Deep technical knowledge of thin wafer handling, bumping technologies (Solder bump, Cu Pillar), wafer dicing, and far-back-end flow.
- Quality Frameworks: Robust understanding of reliability qualification testing (e.g., JEDEC standards), FMEA/PFMEA.
- Software & Analysis Tools: Proficiency in statistical data analysis software like JMP or Minitab.
Soft Skills & Interpersonal Attributes
- Cross-Functional Leadership: Proven capability to collaborate across global time zones with internal IC designers, product engineers, supply chain specialists, and quality teams.
- Strong Communication: Highly articulate in English for writing technical white papers, presenting engineering data, and negotiating with suppliers.
- Adaptability: Ability to travel to international OSAT locations on short notice to troubleshoot manufacturing bottlenecks or audit lines.